Many digital systems, for example ATM or other communication switches, are made up of a number of components that are physically located on different printed circuit (PC) boards. The boards are housed in a chassis and are interconnected to one another through signal paths that make up a backplane within the chassis. When the distances between the PC boards is small and/or the system is operated at low speed, it is relatively straight forward to maintain synchronization between the various components. For example, at low operating speeds, the skew among various components caused by relative differences in signal path lengths between the PC boards may cause operational problems. Then, as the PC boards become larger and/or as operating speed are increased, maintaining synchronization between the components becomes even more difficult and one cannot simply rely on trying to maintain equal signal path lengths. Moreover, if propagation delays along the signal path traces are long (e.g., so long as to exceed one clock period), additional operating problems may be encountered.
What is needed therefore, is a means for ensuring synchronization within an inherently asynchronous system such as a digital switch or other device that is made up of various components physically located on PC boards and the like.